At the 3nm and 5nm nodes, light arrives as individual photons landing at random. That randomness drives defects that today require expensive simulation or physical test wafers to find. We predict those hotspots directly from layout — in seconds, on a laptop.
Every shrink in chip geometry means fewer photons define each feature. At EUV wavelengths, a critical edge may be shaped by only a handful of photons. Because photon arrival is fundamentally random — Poisson statistics — some edges land short, some bridge, and yield suffers.
The industry's current tools force a hard trade. Full-physics simulators are accurate but take hours per layer. Machine-learning tools are fast but treat the physics as a black box, offering no insight a process engineer can act on.
The result: defect discovery happens late — often on physical test wafers costing tens of thousands of dollars per run. There is a gap between "fast but blind" and "accurate but slow." That gap is where yield is lost.
Four stages take a chip layout from photon statistics to a per-pixel defect probability map. Each stage models one physical process — and uses the right mathematics for that process, not one approximation forced everywhere.
Monte Carlo sampling of Poisson-distributed photon arrivals across the mask — the true source of stochastic variation.
A physics-derived, non-Gaussian kernel spreads energy the way real secondary electrons do — with a heavier tail than any Gaussian approximation.
Acid generation and diffusion drive a development threshold, producing per-pixel misprint labels grounded in resist physics.
A fast model reproduces the full simulation's defect map in a single pass — replacing hours of Monte Carlo with milliseconds.
The distinguishing choice: we use each mathematical model where the physics calls for it. Electron transport genuinely has a heavy tail, so Stage 2 uses a non-Gaussian kernel. Acid diffusion is genuinely Fickian, so Stage 3 uses a Gaussian. Matching the math to the mechanism is what makes the output trustworthy to an engineer.
All four stages run end to end in Python with NumPy and SciPy. Zero proprietary dependencies.
A comprehensive automated test suite verifies the physics, the statistics, and bit-for-bit reproducibility under fixed seeds.
The surrogate reproduces full Monte Carlo defect maps roughly four orders of magnitude faster on held-out layouts.
A provisional patent application covering the core method is in preparation with a formal prior-art review underway.
A plain-language brief on why EUV stochastic defects are the yield challenge of the sub-5nm era, and how a physics-informed software approach predicts them before fabrication. Written for engineers, investors, and program managers alike.
Stochastic Cascade Systems is founded by Marcelo Bayon, an independent research engineer based in Salt Lake City, Utah. The work bridges applied physics, probabilistic modeling, and scientific computing — translating a hard manufacturing problem into software that runs anywhere.
Open to collaboration with semiconductor process teams, computational physicists, university researchers, and grant partners. If this problem is yours too, let's talk.